VisSim/Embedded Controls Developer™

VisSim/Embedded Controls Developer (VisSim/ECD) is an environment for model-based development of embedded control systems. Using a block diagram approach, you can quickly create a working model of your control system; it can be as simple as a PID control or as complex as a multi-axis sensorless FOC PMSM controller with packet-based RS485 command protocol and dynamic I2C EEPROM read/write.
With your model in diagram form, you simulate and generate code. In simulation mode, it is fast and easy to prototype, optimize, and debug before you ever generate code. Once you are happy with the simulated performance, just click the Compile button to generate highly efficient C code and compile it to a target executable. The VisSim target HotLink lets you download and interactively debug your algorithm while it runs on the target.
VisSim/ECD is unique in its ability to generate highly efficient, high sample rate, low jitter target executables. For example, a closed-loop PID control with encoder input and PWM output and one digital output line takes 1.1K flash and 100 bytes RAM on the MSP430, and VisSim/ECD generated code can sample at rates over 1 MHz on the F28335. As a TI 3rd party partner, Visual Solutions has gained valuable access to TI technology to tune VisSim/ECD to make best use of TI processors and peripherals.

Includes Complete, Royalty Free, Low Overhead, Low-Jitter RTOS

  • Graphical specification of tasks:
    • High speed foreground task rate and interrupt source
    • Multi-rate synchronous subtasks
    • Unlimited pre-emptible background tasks at custom rates
    • Inter-task communication
    • Interrupt handlers for on-chip peripheral events
  • Interrupt handlers for serial peripherals (SPI, UART, I2C)
  • Graphical Configuration of Device Drivers for all on-chip peripherals
  • Tracking of CPU, stack and heap usage

Benefits

Use of a high level model-based programming tool like VisSim/ECD offers many benefits:
  • Lets you think, program and debug at a much higher level of abstraction
  • Removes the requirement for one or more dedicated "C" programmers
  • Speeds implementation of on-chip peripheral drivers by providing a simple block and configuration dialog interface
  • Automatic code generator uses consistent subset of C language that generates efficient correct code
  • Speeds the edit-debug cycle
But perhaps the biggest advantage of VisSim/ECD is the increase in consistency and reliability that VisSim/ECD brings to the finished product. Because the generated code is done automatically, VisSim/ECD uses a smaller set of C language features to implement an algorithm, as well as generating syntactically and semantically correct C code. With hand coding, any number of small programming errors like a misplaced curly brace, function argument mismatch, unexpected expression evaluation order, or just a misplaced semicolon can result in small, hard to find errors. By automatically generating a well-tested C code subset, these common coding problems are eliminated. In addition, the chief architect of the VisSim code generator served on the ANSI C committee from the first meeting to the last, and authored a book on the C language, so he knows the best way to use C to get reliable, efficient performance.
Renewable Energy board
VisSim diagram to drive 20kHz switched 3-phase PWM at 60Hz
When I used C-code for developing and debugging my digital control algorithms it was like fumbling around a twisty maze with high walls. When I switched to VisSim it was like getting a birds-eye view of that maze and a clear view of the path to solution. I would never go back to C-coding for my digital power and digital control applications. It would be like using assembler after having used C.

Anthony Boon - Chief Engineer
ETA Electronic Design SAGL

Features

  • VisSim/Fixed Point block set performs simulation and efficient code generation of scaled fixed-point operations like sin, cos, sqrt, atan2, FIR, and IIR; overflow and precision loss effects are easily seen and corrected at simulation time; auto-scaling speeds fixed-point development; in-line code generation creates fast target code
  • Peripheral blocks to generate code for C2000 on-chip devices: 280x ePWM, eQEP, eCAP, ADC, GPIO, quadrature encoder, event capture, CAN 2.0, SCI(RS232,UART,serial port), SPI, McBSP, watchdog, and interrupts
  • Full control of PWM including dynamic control of PWM period and phase, ADC start of conversion, trip zone, deadband intervals, action selection
  • Interrupt-based queue drivers for serial(SCI), SPI, and McBSP; user selectable queue lengths and use of hardware FIFO result in lower system overhead
  • Diagram-based interrupt handlers for XINT, ADC, PWM, and DMA
  • Easy creation of background tasks Subsystem dialog box to create a background task that runs at a user specified rate
  • TI C2000 Digital Motor Control (DMC) block set supports simulation and code generation of efficient, fixed-point routines for Park and Clarke transforms, rotor speed and flux estimation, PID control, space vector wave form generation for AC Induction and brushless DC motor control
  • Automatic C code generation of production quality fixed-point code, compile, link, and JTAG download
  • Supported processors include TI MSP430 (all flavors), C2000 (all flavors) including F2808 and variations, F28027, F28035 (Piccolo), F28335(Delfino), LF2407, F2812, C5510, C6713, Intel x86 PC
  • Retention of the VisSim GUI while algorithm executes on MCU lets you visualize interactive plots of MCU outputs and change MCU gains and parameters in real time
  • VisSim Code Composer Studio (CCS) plug-in for automatic CCS project creation
  • TI C2000 CAN bus support
  • Serial-port-based LCD display support
  • Efficient 7- and 14-segment LCD display support for MSP430; user table can customize segment assignments; auto conversion from scaled fixed-point to decimal display uses no floating point and no divide for maximum efficiency on MSP architecture
  • Conditional execution of subsystems based on any Boolean condition, including occurrence of interrupt
  • User control of execution order of parallel flows is done top down; subsystem contents are completely executed before the next block on given layer, which provides fine grain control necessary for hardware device access
  • State transition block provides unlimited states and transition conditions, transition conditions are C expressions

Downloads

» Free Trial Version
» VisSim Data Sheets
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